Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - filter fir vhdl

Search list

[Communication-Mobile] VHDL_FIR11

Description: 用VHDL实现查找表方式的FIR滤波器-using VHDL search forms for the FIR filter
Platform: | Size: 11886 | Author: 梁立林 | Hits:

[VHDL-FPGA-Verilog] firshuzilvboqi

Description: :介绍了基于FPGA的FIR数字滤波器的设计与实现,该设计利用Matlab工具箱设计窗函数计算FIR滤波器系数,并通过VHDL层次化设计方法,同时FPGA与单片机有机结合,采用C51及VHDL语言模块化的设计思想及进行优化编程,有效实现了键盘可设置参数及LCD显示。结果表明此实现结构能进一步完善数据的快速处理和有效控制,提高了设计的灵活性、可靠性和功能的可扩展性。 -: This paper presents FPGA-based FIR digital filter design and realization of the design using Matlab toolbox window function designed FIR filter coefficient calculation, and through VHDL hierarchical design methodology, FPGA and MCU at the same time the organic combination of the use of C51 and VHDL language modular design concepts and optimize the programming, the effective realization of the keyboard to set the parameters and the LCD display. The results show that this structure can be further improved to achieve rapid data processing and effective controls, improved design flexibility, reliability and scalability features.
Platform: | Size: 7168 | Author: 佘斌 | Hits:

[VHDL-FPGA-Verilog] FIR_Direkt_ak

Description: VHDL代码的直接型FIR滤波器22阶。Fa=48 kHz, Fc=10kHz 可以在ModelSim下仿真， FPGA实现。 -VHDL code of the direct-type 22-order FIR filter. Fa = 48 kHz, Fc = 10kHz can be under the ModelSim simulation, FPGA realization.
Platform: | Size: 1024 | Author: 李乔 | Hits:

[VHDL-FPGA-Verilog] FIR_Direkt_BAB_P

Description: VHDL编写的代码。采用流水线方法实现的FIR滤波器。22阶。Fa=48kHz, Fc=10KHz。可用ModeSim仿真并FPGA实现-Code written in VHDL. Line method using the FIR filter. 22 bands. Fa = 48kHz, Fc = 10KHz. Can be used to achieve ModeSim simulation and FPGA
Platform: | Size: 1024 | Author: 李乔 | Hits:

[VHDL-FPGA-Verilog] VHDL_FIR_PRO_scr

Description: 可编程的FIR滤波器VHDL实现，只要输入FIR的阶数以及系数，就可在FPGA中实现FIR滤波器-Programmable FIR filter VHDL implementation, simply enter the order number as well as the FIR coefficients, we can implement FIR filters in FPGA
Platform: | Size: 3072 | Author: wuyihua | Hits:

[source in ebook] Finiteimpulseresponsefirfilter

Description: This code is a VHDL based code for FIR filter.A finite impulse response (FIR ) filter is a type of a digital filter. The impulse response, the filter s response to a Kronecker delta input, is finite because it settles to zero in a finite number of sample intervals.
Platform: | Size: 44032 | Author: kumar | Hits:

[Other] f

Description: vhdl code for FIR filter
Platform: | Size: 1024 | Author: vovanich | Hits:

[Other] hdlsrc

Description: vhdl program to implement symmetric fir filter
Platform: | Size: 2048 | Author: deepu | Hits:

[MPI] FIRFIR1

Description: 基于FPGA的FIR串行滤波器设计与实现，本文运用VHDL编写-FPGA-based FIR filter design and implementation of the serial, the paper prepared by the use of VHDL
Platform: | Size: 1024 | Author: 刘宁 | Hits:

[VHDL-FPGA-Verilog] fir_gen

Description: fIR（有限冲击响应）滤波器基于vhdl语言开发-FIR filter
Platform: | Size: 1024 | Author: hejianhua | Hits:

[Other] Order17firfilter

Description: 17阶FIR滤波器VHDL代码及说明文档-Order 17 FIR filter based on VHDL
Platform: | Size: 744448 | Author: 刘智虎 | Hits:

[VHDL-FPGA-Verilog] lowpowerfir

Description: This project was undertaken to produce a low power FIR filter for inclusion in a VHDL target library. The design was completed using OrCAD s Capture CIS, from this the VHDL code has been extracted. This method has allowed complete testing of the system. The power consumption of various arithmetic architectures has been investigated, and the results have been provided in the intial report (FIRLowPowerConsiderations.doc). These results have enabled the correct power/performance optimization for the FIR filter design.
Platform: | Size: 447488 | Author: Nagendran | Hits:

[VHDL-FPGA-Verilog] 17jieFIR

Description: 17阶FIR滤波器VHDL代码及说明文档-17-order FIR filter VHDL code and documentation
Platform: | Size: 721920 | Author: 钟祥 | Hits:

[VHDL-FPGA-Verilog] multiplier

Description: A VHDL program for multiplier, which has been used as a main source for a fir filter
Platform: | Size: 70656 | Author: siva | Hits:

[VHDL-FPGA-Verilog] VHDLPFIR

Description: 基于VHDL的FIR滤波器设计。详细讲了用硬件设计FIR滤波器！-The FIR filter design based on VHDL. Details about the hardware design of FIR filters with!
Platform: | Size: 436224 | Author: ls | Hits:

[VHDL-FPGA-Verilog] code-and-result-for-66myfir

Description: 该附件为一基于VHDL语言的66阶FIR滤波器设计的整个过程和实验测试结果，对于相关开发人员和初学人员有很好的参考价值。-The Annex is a language based on VHDL-order FIR filter design 66 the whole process and experimental results, for the relevant developers and beginners who have a good reference value.
Platform: | Size: 434176 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] FIR_FPGAlllll

Description: 本文运用vhdl语言，研究了对于FIR滤波器（流水线）的实现与改进，欢迎学习-In this paper, vhdl language study for the FIR filter (line) implementation and improvement are welcome to learn
Platform: | Size: 305152 | Author: zhaobinnan | Hits:

[VHDL-FPGA-Verilog] FPGA_vhdl_fir

Description: 本文讨论了用vhdl的方法设计并研究优化了FIR滤波器，非常实用，欢迎下载-This article discusses ways of using vhdl design and optimization of the FIR filter is very useful, please download
Platform: | Size: 620544 | Author: zhaobinnan | Hits:

[VHDL-FPGA-Verilog] fir1

Description: vhdl program for fir filter design on fpga
Platform: | Size: 1024 | Author: Nikhil Trivedi | Hits:

[VHDL-FPGA-Verilog] fir4

Description: 基于vhdl的长度为4的fir滤波器，经过官方软件认证-Based on the length of 4 vhdl fir filter, after the official software certification
Platform: | Size: 1024 | Author: 李亮 | Hits:
« 1 2 ... 5 6 7 8 9 1011 »

CodeBus www.codebus.net